Recently, the Information Technology Institute – Vietnam National University, Hanoi (VNU), in collaboration with the IEEE CAS Vietnam Section Chapter, organized a seminar titled “From Papers to Physical Designs: Empowering LLM with Integrated Datasets”.
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The speaker of the seminar was Associate Professor Yongfu Li from Shanghai Jiao Tong University, China, a researcher with extensive experience in natural language processing (LLM), chip design, and automation systems. The seminar was chaired by Dr. Bui Duy Hieu, Head of the AIoT Department, Information Technology Institute – Vietnam National University, Hanoi, and was attended by many students from various member universities of VNU.
In the field of analog and high-density integrated circuit design, the application of large language models (LLMs) in debugging and design assistance is opening up new directions to accelerate research and development. One of the major current challenges is the ability to leverage diverse datasets, ranging from scientific literature and research reports to technical specifications and commercial physical designs. The presentation delved into systematic approaches to harness data for LLMs, including techniques for collecting and extracting content from scientific papers, applying computer vision for graph and figure analysis, as well as building integrated datasets to support circuit design.
By combining natural language processing, computer vision, and data mining techniques, the seminar demonstrated ways to enhance the accuracy, efficiency, and applicability of LLMs in circuit design and analysis. This is an interdisciplinary topic that bridges artificial intelligence and electronics, promising to open up new research and application directions for both academia and industry.
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The seminar was expected to provide participants with a more comprehensive view of the potential applications of LLMs in electronics, thereby fostering new ideas in research and technology development.
Yongfu Li,he received the B.Eng. and Ph.D. degrees from the Department of Electrical and Computing Engineering, National University of Singapore (NUS), Singapore. He is currently an Associate Professor with the Department of Micro and Nano Electronics Engineering and MoE Key Lab of Artificial Intelligence, Shanghai Jiao Tong University, China. He was a research engineer with NUS, from 2013 to 2014. He was a senior engineer (2014-2016), principal engineer (2016-2018) and member of technical staff (2018-2019) with GLOBALFOUNDRIES, as a Design-for-Manufacturability (DFM) Computer-Aided Design (CAD) research and development engineer. His research interests include analog/mixed signal circuits, data converters, power converters, biomedical signal processing with deep learning technique and DFM circuit automation. Dr. Li received the Singapore Economic Development Board GLOBALFOUNDRIES Graduate Scholarship. He is actively contributing to the Singapore Section Young Professionals Affinity Group and has served as the Secretary (2012–2013) and the Chair (2014–2015).
